The present invention relates generally to digital computer memory applications, and more particularly, to an improved apparatus and methods for processing data in a random access memory (RAM) system. The improved apparatus and method enable the processing of increased quantities of data through the RAM system during a given period of time as compared to conventional systems.
Nearly all computer systems require some form of a temporary memory storage device in order to effectively execute programs and process data. In the prior art, as exemplified by the methods and systems disclosed in U.S. Pat. No. 4,324,401 to Stubben, et al. (hereinafter referred to as the "'401 patent"), a staging, or line, RAM was used to store video graphics data for one horizontal scan line of video display. The teachings of the '401 patent enabled a number of movable objects to be displayed at any horizontal location on a video display screen without expericening masking effects as was common under prior art systems exemplified by U.S. Pat. No. 4,116,444 to Mayer, et al. (hereinafter referred to as the "'444 patent"),
While the '401 patent represented an advance over the prior art, it has some important drawbacks. For example, the number of movable objects which could be displayed on a given horizontal scan line is severely limited by the strict time constraints typical of video display systems. Specifically, having only one line RAM necessitates the writing of graphics data only during the horizontal blanking period, since the line RAM must output data during the visible display period. The timing characteristics of the '401 patent can be improved by the standard technique of employing double buffered line RAMS. Additionally, while it is clear that a pixel of graphics display can be represented by more than one bit of data, it would also be advantageous to process through the RAM system graphics data representing more than one pixel per write cycle, which is not possible with the methods and system disclosed by the '401 patent.
A more efficient apparatus for processing graphics, or pixel, data through a RAM is disclosed in U.S. Pat. No. 4,435,792 to Bechtolsheim (hereinafter referred to as the '792 patent). The apparatus disclosed in the '792 patent enabled the writing of data representing more than one pixel per write cycle. Specifically, the '792 apparatus teaches the ability to read, modify and write a word of sixteen bits of data, representing sixteen pixels of display during a single memory cycle. Additionally, the use of shifters to align the data on an arbitrary bit boundary and sequentially addressing a plurality of memory words enables the sixteen bits of data representing sixteen pixels of display to be written in overlapping word boundaries. However, in order to prevent masking effects with the apparatus disclosed in the '792 patent, it is required to perform a read-modify-write (RMW) operation. The need to perform a RMW operation requires additional time and results in the display of fewer graphic objects on a given horizontal scan line. Further, while the '792 patent teaches the use of a frame buffer, which adds flexibility in graphics display, it also adds excessive cost in memory requirements and is unnecessary in many video applications.
The need exists to provide inexpensive and efficient means for processing data through RAM systems. For example, it would be advantageous to provide means for processing data representing more than one pixel per write cycle to arbitrary bit boundaries without the need to perform read-modify-write operations.